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authorjinkun.hong <jinkun.hong@rock-chips.com>2014-09-25 20:27:26 -0700
committerAaron Durbin <adurbin@google.com>2015-04-02 21:16:55 +0200
commit3e9ea16c54dfe9ac593f772e5ba2f020b2e27c99 (patch)
treed3b6dd0d236407be927ce20d8550fa4ea121b88b /src/arch/mips/bootblock.S
parentbfdd732b80a56e31d3bbe59de76a6a91b0f5b9e4 (diff)
coreboot: rk3288: add new ddr config and support ddr3 freq up to 800mhz
Add ddr3-samsung-2GB config and modify 533mhz linit. Support ddr3 freq up to 800mhz. Enable ODT at LPDDR3. BUG=None TEST=Boot Veyron Pinky Original-Change-Id: Ic02a381985796a00644c5c681b96f10ad1558936 Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/220113 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-Commit-Queue: Julius Werner <jwerner@chromium.org> Change-Id: I867753bc5d1eb301eb4975f5a945bfdba9b8f37d (cherry picked from commit e6689cbb0ec50317672c8ebe4e23555ca2f01005) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9239 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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