- First stab at getting the ppc ports building and working.

- The sandpointx3+altimus has been consolidated into one directory for now.
- Added support for having different versions of the pci access functions
  on a per bus basis if needed.
  Hopefully I have not broken something inadvertently.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

8 files changed, 42 insertions, 122 deletions

diff --git a/src/arch/i386/boot/linuxbios_table.c b/src/arch/i386/boot/linuxbios_table.c
index 594b5e55a9..5b2b34ff8a 100644
--- a/src/arch/i386/boot/linuxbios_table.c
+++ b/src/arch/i386/boot/linuxbios_table.c
@@ -315,7 +315,6 @@ static void build_lb_mem_range(void *gp, struct device *dev, struct resource *re
 static struct lb_memory *build_lb_mem(struct lb_header *head)
 {
 	struct lb_memory *mem;
-	struct device *dev;
 
 	/* Record where the lb memory ranges will live */
 	mem = lb_memory(head);
@@ -343,7 +342,7 @@ unsigned long write_linuxbios_table(
 		struct lb_record *rec_dest, *rec_src;
 		/* Write the option config table... */
 		rec_dest = lb_new_record(head);
-		rec_src = (struct lb_record *)&option_table;
+		rec_src = (struct lb_record *)(void *)&option_table;
 		memcpy(rec_dest,  rec_src, rec_src->size);
 	}
 	/* Record where RAM is located */
diff --git a/src/arch/i386/include/arch/pci_ops.h b/src/arch/i386/include/arch/pci_ops.h
index 51730c4692..72307a6211 100644
--- a/src/arch/i386/include/arch/pci_ops.h
+++ b/src/arch/i386/include/arch/pci_ops.h
@@ -1,18 +1,9 @@
 #ifndef ARCH_I386_PCI_OPS_H
 #define ARCH_I386_PCI_OPS_H
 
-struct pci_ops {
-	uint8_t (*read8)   (uint8_t bus, int devfn, int where);
-	uint16_t (*read16) (uint8_t bus, int devfn, int where);
-	uint32_t (*read32) (uint8_t bus, int devfn, int where);
-	void (*write8)  (uint8_t bus, int devfn, int where, uint8_t val);
-	void (*write16) (uint8_t bus, int devfn, int where, uint16_t val);
-	void (*write32) (uint8_t bus, int devfn, int where, uint32_t val);
-};
-extern const struct pci_ops *conf;
+const struct pci_bus_operations pci_cf8_conf1;
+const struct pci_bus_operations pci_cf8_conf2;
 
-void pci_set_method_conf1(void);
-void pci_set_method_conf2(void);
-void pci_set_method(void);
+void pci_set_method(device_t dev);
 
 #endif /* ARCH_I386_PCI_OPS_H */
diff --git a/src/arch/i386/lib/Config.lb b/src/arch/i386/lib/Config.lb
index 6de19b65be..cdd3fd3891 100644
--- a/src/arch/i386/lib/Config.lb
+++ b/src/arch/i386/lib/Config.lb
@@ -6,7 +6,7 @@
 #option CONFIG_PCIBIOS_IRQ=0
 object c_start.S
 object cpu.c
-object pci_ops.c
+#object pci_ops.c
 object pci_ops_conf1.c
 object pci_ops_conf2.c
 object pci_ops_auto.c
diff --git a/src/arch/i386/lib/exception.c b/src/arch/i386/lib/exception.c
index 86edccbdd2..5f0c4e0563 100644
--- a/src/arch/i386/lib/exception.c
+++ b/src/arch/i386/lib/exception.c
@@ -420,7 +420,7 @@ void x86_exception(struct eregs *info)
 			if (	parse_ulong(&ptr, &addr) && 
 				(*ptr++ == ',') &&
 				parse_ulong(&ptr, &length)) {
-				copy_to_hex(out_buffer, addr, length);
+				copy_to_hex(out_buffer, (void *)addr, length);
 			} else {
 				memcpy(out_buffer, "E01", 4);
 			}
diff --git a/src/arch/i386/lib/pci_ops.c b/src/arch/i386/lib/pci_ops.c
deleted file mode 100644
index ded7fd20a4..0000000000
--- a/src/arch/i386/lib/pci_ops.c
+++ /dev/null
@@ -1,60 +0,0 @@
-#include <console/console.h>
-#include <arch/io.h>
-#include <arch/pciconf.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-
-const struct pci_ops *conf = 0;
-
-/*
- * Direct access to PCI hardware...
- */
-
-uint8_t pci_read_config8(device_t dev, unsigned where)
-{
-	uint8_t value;
-	value = conf->read8(dev->bus->secondary, dev->path.u.pci.devfn, where);
-	printk_spew("Read config 8 bus %d,devfn 0x%x,reg 0x%x,val 0x%x\n",
-		    dev->bus->secondary, dev->path.u.pci.devfn, where, value);
-	return value;
-}
-
-uint16_t pci_read_config16(device_t dev, unsigned where)
-{
-	uint16_t value;
-	value = conf->read16(dev->bus->secondary, dev->path.u.pci.devfn, where);
-	printk_spew( "Read config 16 bus %d,devfn 0x%x,reg 0x%x,val 0x%x\n",
-		     dev->bus->secondary, dev->path.u.pci.devfn, where, value);
-	return value;
-}
-
-uint32_t pci_read_config32(device_t dev, unsigned where)
-{
-	uint32_t value;
-	value = conf->read32(dev->bus->secondary, dev->path.u.pci.devfn, where);
-	printk_spew( "Read config 32 bus %d,devfn 0x%x,reg 0x%x,val 0x%x\n",
-		     dev->bus->secondary, dev->path.u.pci.devfn, where, value);
-	return value;
-}
-
-void pci_write_config8(device_t dev, unsigned where, uint8_t val)
-{
-	printk_spew( "Write config 8 bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
-		     dev->bus->secondary, dev->path.u.pci.devfn, where, val);
-	conf->write8(dev->bus->secondary, dev->path.u.pci.devfn, where, val);
-}
-
-void pci_write_config16(device_t dev, unsigned where, uint16_t val)
-{
-	printk_spew( "Write config 16 bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
-		     dev->bus->secondary, dev->path.u.pci.devfn, where, val);
-	conf->write16(dev->bus->secondary, dev->path.u.pci.devfn, where, val);
-}
-
-void pci_write_config32(device_t dev, unsigned where, uint32_t val)
-{
-	printk_spew( "Write config 32 bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
-		     dev->bus->secondary, dev->path.u.pci.devfn, where, val);
-	conf->write32(dev->bus->secondary, dev->path.u.pci.devfn, where, val);
-}
diff --git a/src/arch/i386/lib/pci_ops_auto.c b/src/arch/i386/lib/pci_ops_auto.c
index 5c45720888..b757e608fc 100644
--- a/src/arch/i386/lib/pci_ops_auto.c
+++ b/src/arch/i386/lib/pci_ops_auto.c
@@ -1,3 +1,4 @@
+#include <stddef.h>
 #include <console/console.h>
 #include <arch/io.h>
 #include <arch/pciconf.h>
@@ -15,11 +16,12 @@
  * This should be close to trivial, but it isn't, because there are buggy
  * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.
  */
-static int pci_sanity_check(const struct pci_ops *o)
+static int pci_sanity_check(const struct pci_bus_operations *o)
 {
 	uint16_t class, vendor;
-	uint8_t bus;
+	unsigned bus;
 	int devfn;
+	struct bus pbus; /* Dummy device */
 #define PCI_CLASS_BRIDGE_HOST		0x0600
 #define PCI_CLASS_DISPLAY_VGA		0x0300
 #define PCI_VENDOR_ID_COMPAQ		0x0e11
@@ -27,8 +29,8 @@ static int pci_sanity_check(const struct pci_ops *o)
 #define PCI_VENDOR_ID_MOTOROLA		0x1057
 
 	for (bus = 0, devfn = 0; devfn < 0x100; devfn++) {
-		class = o->read16(bus, devfn, PCI_CLASS_DEVICE);
-		vendor = o->read16(bus, devfn, PCI_VENDOR_ID);
+		class = o->read16(&pbus, bus, devfn, PCI_CLASS_DEVICE);
+		vendor = o->read16(&pbus, bus, devfn, PCI_VENDOR_ID);
 		if (((class == PCI_CLASS_BRIDGE_HOST) || (class == PCI_CLASS_DISPLAY_VGA)) ||
 			((vendor == PCI_VENDOR_ID_INTEL) || (vendor == PCI_VENDOR_ID_COMPAQ) ||
 				(vendor == PCI_VENDOR_ID_MOTOROLA))) { 
@@ -39,7 +41,7 @@ static int pci_sanity_check(const struct pci_ops *o)
 	return 0;
 }
 
-static void pci_check_direct(void)
+const struct pci_bus_operations *pci_check_direct(void)
 {
 	unsigned int tmp;
 
@@ -50,13 +52,12 @@ static void pci_check_direct(void)
 		outb(0x01, 0xCFB);
 		tmp = inl(0xCF8);
 		outl(0x80000000, 0xCF8);
-		if (inl(0xCF8) == 0x80000000) {
-			pci_set_method_conf1();
-			if (pci_sanity_check(conf)) {
-				outl(tmp, 0xCF8);
-				printk_debug("PCI: Using configuration type 1\n");
-				return;
-			}
+		if ((inl(0xCF8) == 0x80000000) && 
+			pci_sanity_check(&pci_cf8_conf1)) 
+		{
+			outl(tmp, 0xCF8);
+			printk_debug("PCI: Using configuration type 1\n");
+			return &pci_cf8_conf1;
 		}
 		outl(tmp, 0xCF8);
 	}
@@ -68,25 +69,23 @@ static void pci_check_direct(void)
 		outb(0x00, 0xCFB);
 		outb(0x00, 0xCF8);
 		outb(0x00, 0xCFA);
-		if (inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00) {
-			pci_set_method_conf2();
-			if (pci_sanity_check(conf)) {
-				printk_debug("PCI: Using configuration type 2\n");
-			}
+		if ((inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00) &&
+			pci_sanity_check(&pci_cf8_conf2))
+		{
+			printk_debug("PCI: Using configuration type 2\n");
+			return &pci_cf8_conf2;
 		}
 	}
 
-	printk_debug("pci_check_direct failed\n");
-	conf = 0;
-    
-	return;
+	die("pci_check_direct failed\n");
+	return NULL;
 }
 
 /** Set the method to be used for PCI, type I or type II
  */
-void pci_set_method(void)
+void pci_set_method(device_t dev)
 {
 	printk_info("Finding PCI configuration type.\n");
-	pci_check_direct();
+	dev->ops->ops_pci_bus = pci_check_direct();
 	post_code(0x5f);
 }
diff --git a/src/arch/i386/lib/pci_ops_conf1.c b/src/arch/i386/lib/pci_ops_conf1.c
index 1324add74a..fb0a434d53 100644
--- a/src/arch/i386/lib/pci_ops_conf1.c
+++ b/src/arch/i386/lib/pci_ops_conf1.c
@@ -10,37 +10,37 @@
 
 #define CONFIG_CMD(bus,devfn, where)   (0x80000000 | (bus << 16) | (devfn << 8) | (where & ~3))
 
-static uint8_t pci_conf1_read_config8(unsigned char bus, int devfn, int where)
+static uint8_t pci_conf1_read_config8(struct bus *pbus, unsigned char bus, int devfn, int where)
 {
 	outl(CONFIG_CMD(bus, devfn, where), 0xCF8);
 	return inb(0xCFC + (where & 3));
 }
 
-static uint16_t pci_conf1_read_config16(unsigned char bus, int devfn, int where)
+static uint16_t pci_conf1_read_config16(struct bus *pbus, unsigned char bus, int devfn, int where)
 {
 	outl(CONFIG_CMD(bus, devfn, where), 0xCF8);
 	return inw(0xCFC + (where & 2));
 }
 
-static uint32_t pci_conf1_read_config32(unsigned char bus, int devfn, int where)
+static uint32_t pci_conf1_read_config32(struct bus *pbus, unsigned char bus, int devfn, int where)
 {
 	outl(CONFIG_CMD(bus, devfn, where), 0xCF8);
 	return inl(0xCFC);
 }
 
-static void  pci_conf1_write_config8(unsigned char bus, int devfn, int where, uint8_t value)
+static void  pci_conf1_write_config8(struct bus *pbus, unsigned char bus, int devfn, int where, uint8_t value)
 {
 	outl(CONFIG_CMD(bus, devfn, where), 0xCF8);
 	outb(value, 0xCFC + (where & 3));
 }
 
-static void pci_conf1_write_config16(unsigned char bus, int devfn, int where, uint16_t value)
+static void pci_conf1_write_config16(struct bus *pbus, unsigned char bus, int devfn, int where, uint16_t value)
 {
 	outl(CONFIG_CMD(bus, devfn, where), 0xCF8);
 	outw(value, 0xCFC + (where & 2));
 }
 
-static void pci_conf1_write_config32(unsigned char bus, int devfn, int where, uint32_t value)
+static void pci_conf1_write_config32(struct bus *pbus, unsigned char bus, int devfn, int where, uint32_t value)
 {
 	outl(CONFIG_CMD(bus, devfn, where), 0xCF8);
 	outl(value, 0xCFC);
@@ -48,7 +48,7 @@ static void pci_conf1_write_config32(unsigned char bus, int devfn, int where, ui
 
 #undef CONFIG_CMD
 
-static const struct pci_ops pci_direct_conf1 =
+const struct pci_bus_operations pci_cf8_conf1 =
 {
 	.read8  = pci_conf1_read_config8,
 	.read16 = pci_conf1_read_config16,
@@ -57,8 +57,3 @@ static const struct pci_ops pci_direct_conf1 =
 	.write16 = pci_conf1_write_config16,
 	.write32 = pci_conf1_write_config32,
 };
-
-void pci_set_method_conf1(void)
-{
-	conf = &pci_direct_conf1;
-}
diff --git a/src/arch/i386/lib/pci_ops_conf2.c b/src/arch/i386/lib/pci_ops_conf2.c
index 9fa03f18a8..10fde93346 100644
--- a/src/arch/i386/lib/pci_ops_conf2.c
+++ b/src/arch/i386/lib/pci_ops_conf2.c
@@ -12,7 +12,7 @@
 #define FUNC(devfn)		(((devfn & 7) << 1) | 0xf0)
 #define SET(bus,devfn)		outb(FUNC(devfn), 0xCF8); outb(bus, 0xCFA);
 
-static uint8_t pci_conf2_read_config8(unsigned char bus, int devfn, int where)
+static uint8_t pci_conf2_read_config8(struct bus *pbus, unsigned char bus, int devfn, int where)
 {
 	uint8_t value;
 	SET(bus, devfn);
@@ -21,7 +21,7 @@ static uint8_t pci_conf2_read_config8(unsigned char bus, int devfn, int where)
 	return value;
 }
 
-static uint16_t pci_conf2_read_config16(unsigned char bus, int devfn, int where)
+static uint16_t pci_conf2_read_config16(struct bus *pbus, unsigned char bus, int devfn, int where)
 {
 	uint16_t value;
 	SET(bus, devfn);
@@ -30,7 +30,7 @@ static uint16_t pci_conf2_read_config16(unsigned char bus, int devfn, int where)
 	return value;
 }
 
-static uint32_t pci_conf2_read_config32(unsigned char bus, int devfn, int where)
+static uint32_t pci_conf2_read_config32(struct bus *pbus, unsigned char bus, int devfn, int where)
 {
 	uint32_t value;
 	SET(bus, devfn);
@@ -39,21 +39,21 @@ static uint32_t pci_conf2_read_config32(unsigned char bus, int devfn, int where)
 	return value;
 }
 
-static void pci_conf2_write_config8(unsigned char bus, int devfn, int where, uint8_t value)
+static void pci_conf2_write_config8(struct bus *pbus, unsigned char bus, int devfn, int where, uint8_t value)
 {
 	SET(bus, devfn);
 	outb(value, IOADDR(devfn, where));
 	outb(0, 0xCF8);
 }
 
-static void pci_conf2_write_config16(unsigned char bus, int devfn, int where, uint16_t value)
+static void pci_conf2_write_config16(struct bus *pbus, unsigned char bus, int devfn, int where, uint16_t value)
 {
 	SET(bus, devfn);
 	outw(value, IOADDR(devfn, where));
 	outb(0, 0xCF8);
 }
 
-static void pci_conf2_write_config32(unsigned char bus, int devfn, int where, uint32_t value)
+static void pci_conf2_write_config32(struct bus *pbus, unsigned char bus, int devfn, int where, uint32_t value)
 {
 	SET(bus, devfn);
 	outl(value, IOADDR(devfn, where));
@@ -64,7 +64,7 @@ static void pci_conf2_write_config32(unsigned char bus, int devfn, int where, ui
 #undef IOADDR
 #undef FUNC
 
-static const struct pci_ops pci_direct_conf2 =
+const struct pci_bus_operations pci_cf8_conf2 =
 {
 	.read8  = pci_conf2_read_config8,
 	.read16 = pci_conf2_read_config16,
@@ -74,7 +74,3 @@ static const struct pci_ops pci_direct_conf2 =
 	.write32 = pci_conf2_write_config32,
 };
 
-void pci_set_method_conf2(void)
-{
-	conf = &pci_direct_conf2;
-}