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authorMichael Xie <Michael.Xie@amd.com>2008-09-22 13:07:20 +0000
committerStefan Reinauer <stepan@openbios.org>2008-09-22 13:07:20 +0000
commit06755e404eb4b97dab5bc5ff90443f7d7d74d3cf (patch)
tree5558c824b995599f02caad278c646587bdc7e8b5 /src/arch/i386
parent0b0771d180d5b18a3d698ccac54449112a9fca91 (diff)
Patch for AMD RS690 chipset.
All the PCIe slots are enabled in this patch except power management. Signed-off-by: Michael Xie <Michael.Xie@amd.com> Reviewed-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386')
-rw-r--r--src/arch/i386/boot/coreboot_table.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c
index 900ab7c106..86cb9a388b 100644
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/i386/boot/coreboot_table.c
@@ -447,6 +447,15 @@ unsigned long write_coreboot_table(
lb_add_memory_range(mem, LB_MEM_TABLE,
rom_table_start, rom_table_end-rom_table_start);
+ /* AMD rs690 chip, we should remove the UMA from system memory. */
+#if (CONFIG_GFXUMA == 1)
+ printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
+ uma_memory_start, uma_memory_size);
+ lb_add_memory_range(mem, LB_MEM_TABLE,
+ uma_memory_start, uma_memory_size);
+#endif
+
+
/* Note:
* I assume that there is always memory at immediately after
* the low_table_end. This means that after I setup the coreboot table.