- To reduce confuse rename the parts of linuxbios bios that run from

  ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 185 insertions, 2 deletions

diff --git a/src/arch/i386/lib/Config.lb b/src/arch/i386/lib/Config.lb
index 092434acab..82adea0e0c 100644
--- a/src/arch/i386/lib/Config.lb
+++ b/src/arch/i386/lib/Config.lb
@@ -7,4 +7,4 @@
 object c_start.S
 object cpu.c
 object pci_ops.c
-
+object exception.c
diff --git a/src/arch/i386/lib/c_start.S b/src/arch/i386/lib/c_start.S
index c82da2f76e..2e397f8847 100644
--- a/src/arch/i386/lib/c_start.S
+++ b/src/arch/i386/lib/c_start.S
@@ -1,5 +1,6 @@
 #include <arch/asm.h>
 #include <arch/intel.h>
+
 	.section ".text"
 	.code32
 	.globl _start
@@ -47,6 +48,24 @@ _start:
 	/* Save the stack location */
 	movl	%esp, %ebp
 
+	/* Initialize the Interrupt Descriptor table */
+	leal	_idt, %edi
+	leal	vec0, %ebx
+	movl	$(0x10 << 16), %eax	/* cs selector */
+
+1:	movw	%bx, %ax
+	movl	%ebx, %edx
+	movw	$0x8E00, %dx		/* Interrupt gate - dpl=0, present */
+	movl	%eax, 0(%edi)
+	movl	%edx, 4(%edi)
+	addl	$6, %ebx
+	addl	$8, %edi
+	cmpl	$_idt_end, %edi
+	jne	1b
+
+	/* Load the Interrupt descriptor table */
+	lidt	idtarg
+
 	/*
 	 *	Now we are finished. Memory is up, data is copied and
 	 *	bss is cleared.   Now we call the main routine and
@@ -64,15 +83,170 @@ _start:
 	intel_chip_post_macro(0xee)	/* post fe */
 	hlt
 	jmp	.Lhlt
+	
+vec0:
+	pushl	$0 /* error code */
+	pushl	$0 /* vector */
+	jmp int_hand
+vec1:
+	pushl	$0 /* error code */
+	pushl	$1 /* vector */
+	jmp int_hand
+	
+vec2:
+	pushl	$0 /* error code */
+	pushl	$2 /* vector */
+	jmp int_hand
+	
+vec3:
+	pushl	$0 /* error code */
+	pushl	$3 /* vector */
+	jmp	int_hand
+	
+vec4:
+	pushl	$0 /* error code */
+	pushl	$4 /* vector */
+	jmp	int_hand
+	
+vec5:
+	pushl	$0 /* error code */
+	pushl	$5 /* vector */
+	jmp	int_hand
+	
+vec6:
+	pushl	$0 /* error code */
+	pushl	$6 /* vector */
+	jmp	int_hand
+	
+vec7:
+	pushl	$0 /* error code */
+	pushl	$7 /* vector */
+	jmp	int_hand
+	
+vec8:
+	/* error code */
+	pushl	$8 /* vector */
+	jmp	int_hand
+	.word	0x9090
+	
+vec9:
+	pushl	$0 /* error code */
+	pushl	$9 /* vector */
+	jmp int_hand
+	
+vec10:
+	/* error code */
+	pushl	$10 /* vector */
+	jmp	int_hand
+	.word	0x9090
+	
+vec11:
+	/* error code */
+	pushl	$11 /* vector */
+	jmp	int_hand
+	.word	0x9090
+		
+vec12:
+	/* error code */
+	pushl	$12 /* vector */
+	jmp	int_hand
+	.word	0x9090
+	
+vec13:
+	/* error code */
+	pushl	$13 /* vector */
+	jmp	int_hand
+	.word	0x9090
+	
+vec14:
+	/* error code */
+	pushl	$14 /* vector */
+	jmp	int_hand
+	.word	0x9090
+	
+vec15:
+	pushl	$0 /* error code */
+	pushl	$15 /* vector */
+	jmp	int_hand
+	
+vec16:
+	pushl	$0 /* error code */
+	pushl	$16 /* vector */
+	jmp	int_hand
+	
+vec17:
+	/* error code */
+	pushl	$17 /* vector */
+	jmp	int_hand
+	.word	0x9090
+	
+vec18:
+	pushl	$0 /* error code */
+	pushl	$18 /* vector */
+	jmp	int_hand
+	
+vec19:
+	pushl	$0 /* error code */
+	pushl	$19 /* vector */
+	jmp	int_hand
+int_hand:
+	/* At this point on the stack there is:
+	 *  0(%esp) vector
+	 *  4(%esp) error code
+	 *  8(%esp) eip
+	 * 12(%esp) cs
+	 * 16(%esp) eflags
+	 */
+	pushl	%edi
+	pushl	%esi
+	pushl	%ebp
+	/* Original stack pointer */
+	leal	32(%esp), %ebp
+	pushl	%ebp
+	pushl	%ebx
+	pushl	%edx
+	pushl	%ecx
+	pushl	%eax
 
+	pushl	%esp	/* Pointer to structure on the stack */
+	call	x86_exception
+	pop	%eax	/* Drop the pointer */
 
-	.globl gdt, gdt_end, gdt_limit
+	popl	%eax
+	popl	%ecx
+	popl	%edx
+	popl	%ebx
+	popl	%ebp /* Ignore saved %esp value */
+	popl	%ebp
+	popl	%esi
+	popl	%edi
+
+	addl	$8, %esp /* pop of the vector and error code */
+
+	iret
+
+#if CONFIG_GDB_STUB == 1
+
+	.globl gdb_stub_breakpoint
+gdb_stub_breakpoint:
+	popl	%eax	/* Return address */
+	pushfl	
+	pushl	%cs
+	pushl	%eax	/* Return address */
+	pushl	$0	/* No error code */
+	pushl	$32	/* vector 32 is user defined */
+	jmp	int_hand
+
+#endif
+
+	.globl gdt, gdt_end, gdt_limit, idtarg
 
 gdt_limit = gdt_end - gdt - 1 /* compute the table limit */
 gdtaddr:
 	.word	gdt_limit
 	.long	gdt                /* we know the offset */
 
+	 .data
 gdt:
 // selgdt 0
 	.word	0x0000, 0x0000		/* dummy */
@@ -112,4 +286,13 @@ gdt:
 #endif // defined(CONFIG_VGABIOS) && (CONFIG_VGABIOS == 1)
 gdt_end:
 
+idtarg:
+	.word	_idt_end - _idt - 1	/* limit */
+	.long	_idt
+	.word	0	
+_idt:
+	.fill	20, 8, 0	# idt is unitiailzed
+_idt_end:
+
+	.previous
 .code32