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authorEric Biederman <ebiederm@xmission.com>2003-07-19 04:28:22 +0000
committerEric Biederman <ebiederm@xmission.com>2003-07-19 04:28:22 +0000
commit9b4336cf418d22551bea09d93e1cee79281b110e (patch)
tree3f1e24216c11918644a98fd1e46e2fdb40fd12fe /src/arch/i386/lib
parentfe4414587a4466b848184b8837d4c5a280949824 (diff)
- Major cleanup of the bootpath
- Changes to allow more code to be compiled both ways - Working SMP support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/lib')
-rw-r--r--src/arch/i386/lib/cpu.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/src/arch/i386/lib/cpu.c b/src/arch/i386/lib/cpu.c
index 19020fee55..95dba5f8e5 100644
--- a/src/arch/i386/lib/cpu.c
+++ b/src/arch/i386/lib/cpu.c
@@ -57,16 +57,16 @@ static void interrupts_on()
#if defined(APIC)
/* Only Pentium Pro and later have those MSR stuff */
- unsigned long low, high;
+ msr_t msr;
printk_info("Setting up local apic...");
/* Enable the local apic */
- rdmsr(APIC_BASE_MSR, low, high);
- low |= APIC_BASE_MSR_ENABLE;
- low &= ~APIC_BASE_MSR_ADDR_MASK;
- low |= APIC_DEFAULT_BASE;
- wrmsr(APIC_BASE_MSR, low, high);
+ msr = rdmsr(APIC_BASE_MSR);
+ msr.lo |= APIC_BASE_MSR_ENABLE;
+ msr.lo &= ~APIC_BASE_MSR_ADDR_MASK;
+ msr.lo |= APIC_DEFAULT_BASE;
+ wrmsr(APIC_BASE_MSR, msr);
/*
* Set Task Priority to 'accept all'.
@@ -103,13 +103,13 @@ static void interrupts_on()
#else /* APIC */
#ifdef i686
/* Only Pentium Pro and later have those MSR stuff */
- unsigned long low, high;
+ msr_t msr;
printk_info("Disabling local apic...");
- rdmsr(APIC_BASE_MSR, low, high);
- low &= ~APIC_BASE_MSR_ENABLE;
- wrmsr(APIC_BASE_MSR, low, high);
+ msr = rdmsr(APIC_BASE_MSR);
+ msr.lo &= ~APIC_BASE_MSR_ENABLE;
+ wrmsr(APIC_BASE_MSR, msr);
#endif /* i686 */
#endif /* APIC */
printk_info("done.\n");
@@ -143,6 +143,7 @@ unsigned long cpu_initialize(struct mem_range *mem)
configure_l2_cache();
#endif
interrupts_on();
+ processor_id = this_processors_id();
printk_info("CPU #%d Initialized\n", processor_id);
return processor_id;
}