Tiny Bootblock, step 1/n.

Introduce the tiny bootblock infrastructure and use it on QEmu.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 61 insertions, 0 deletions

diff --git a/src/arch/i386/init/bootblock.c b/src/arch/i386/init/bootblock.c
new file mode 100644
index 0000000000..eea0198d00
--- /dev/null
+++ b/src/arch/i386/init/bootblock.c
@@ -0,0 +1,24 @@
+static unsigned long findstage(char* target)
+{
+	unsigned long entry;
+	asm volatile (
+		"mov $1f, %%esp\n\t"
+		"jmp walkcbfs\n\t"
+		"1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edx", "edi", "ebp", "esp");
+	return entry;
+}
+
+static void call(unsigned long addr)
+{
+	asm volatile ("jmp %0\n\t" : : "r" (addr));
+}
+
+static void main(void)
+{
+	const char* target1 = "fallback/romstage";
+	unsigned long entry;
+	entry = findstage(target1);
+	if (entry) call(entry);
+	asm volatile ("1:\n\thlt\n\tjmp 1b\n\t");
+}
+
diff --git a/src/arch/i386/init/bootblock_prologue.c b/src/arch/i386/init/bootblock_prologue.c
new file mode 100644
index 0000000000..f921c3f8d0
--- /dev/null
+++ b/src/arch/i386/init/bootblock_prologue.c
@@ -0,0 +1,37 @@
+/* -*- asm -*-
+ * $ $
+ *
+ */
+
+/* 
+ * Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer
+ *
+ * This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * Originally this code was part of ucl the data compression library
+ * for upx the ``Ultimate Packer of eXecutables''.
+ *
+ * - Converted to gas assembly, and refitted to work with etherboot.
+ *   Eric Biederman 20 Aug 2002
+ * - Merged the nrv2b decompressor into crt0.base of coreboot
+ *   Eric Biederman 26 Sept 2002
+ */
+
+
+#include <arch/asm.h>
+#include <arch/intel.h>
+#include <console/loglevel.h>	
+
+/*
+ * This is the entry code the code in .reset section
+ * jumps to this address.
+ *
+ */
+.section ".rom.data", "a", @progbits
+.section ".rom.text", "ax", @progbits
+
+	intel_chip_post_macro(0x01)             /* delay for chipsets */
+