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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-05-27 14:19:31 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-05-27 14:19:31 +0000
commita034dca42cc1638e4917e38b98e7dc6b434f2357 (patch)
tree2050fd887fff8d644260cf0168efc5272ce56d24 /src/arch/i386/init
parent8341f44f98ad6fe8760d348e7c3cca8f49eb2557 (diff)
Move coreboot_ram and coreboot_apc to CBFS. This allows to
reduce the size of the bootblock (done for kontron/986lcd-m) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/init')
-rw-r--r--src/arch/i386/init/crt0.S.lb12
-rw-r--r--src/arch/i386/init/ldscript_cbfs.lb59
-rw-r--r--src/arch/i386/init/ldscript_fallback_cbfs.lb64
3 files changed, 135 insertions, 0 deletions
diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index c54e7053d0..dd51899441 100644
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -73,6 +73,10 @@ __main:
movl $0x4000000, %esp
movl %esp, %ebp
pushl %esi
+#ifdef CONFIG_CBFS
+ pushl $str_coreboot_ram_name
+ call cbfs_and_run_core
+#else
movl $_liseg, %esi
movl $_iseg, %edi
movl $_eiseg, %ecx
@@ -81,6 +85,7 @@ __main:
pushl %edi
pushl %esi
call copy_and_run_core
+#endif
.Lhlt:
intel_chip_post_macro(0xee) /* post fe */
@@ -137,6 +142,13 @@ str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n"
#else
str_copying_to_ram: .string "Copying coreboot to RAM.\r\n"
#endif
+#if CONFIG_CBFS
+# if USE_FALLBACK_IMAGE == 1
+str_coreboot_ram_name: .string "fallback/coreboot_ram"
+# else
+str_coreboot_ram_name: .string "normal/coreboot_ram"
+# endif
+#endif
str_pre_main: .string "Jumping to coreboot.\r\n"
.previous
diff --git a/src/arch/i386/init/ldscript_cbfs.lb b/src/arch/i386/init/ldscript_cbfs.lb
new file mode 100644
index 0000000000..e86befb1ca
--- /dev/null
+++ b/src/arch/i386/init/ldscript_cbfs.lb
@@ -0,0 +1,59 @@
+/*
+ * Memory map:
+ *
+ * _RAMBASE
+ * : data segment
+ * : bss segment
+ * : heap
+ * : stack
+ * _ROMBASE
+ * : coreboot text
+ * : readonly text
+ */
+/*
+ * Bootstrap code for the STPC Consumer
+ * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ *
+ */
+
+/*
+ * Written by Johan Rydberg, based on work by Daniel Kahlin.
+ * Rewritten by Eric Biederman
+ */
+/*
+ * We use ELF as output format. So that we can
+ * debug the code in some form.
+ */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+
+/*
+ENTRY(_start)
+*/
+
+TARGET(binary)
+SECTIONS
+{
+ . = _ROMBASE;
+
+ /* This section might be better named .setup */
+ .rom . : {
+ _rom = .;
+ *(.rom.text);
+ *(.rom.data);
+ *(.rodata.*);
+ *(.rom.data.*);
+ . = ALIGN(16);
+ _erom = .;
+ }
+
+ _lrom = LOADADDR(.rom);
+ _elrom = LOADADDR(.rom) + SIZEOF(.rom);
+
+ /DISCARD/ : {
+ *(.comment)
+ *(.comment.*)
+ *(.note)
+ *(.note.*)
+ }
+}
diff --git a/src/arch/i386/init/ldscript_fallback_cbfs.lb b/src/arch/i386/init/ldscript_fallback_cbfs.lb
new file mode 100644
index 0000000000..d1b56ce3b2
--- /dev/null
+++ b/src/arch/i386/init/ldscript_fallback_cbfs.lb
@@ -0,0 +1,64 @@
+/*
+ * Memory map:
+ *
+ * _RAMBASE
+ * : data segment
+ * : bss segment
+ * : heap
+ * : stack
+ * _ROMBASE
+ * : coreboot text
+ * : readonly text
+ */
+/*
+ * Bootstrap code for the STPC Consumer
+ * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ *
+ */
+
+/*
+ * Written by Johan Rydberg, based on work by Daniel Kahlin.
+ * Rewritten by Eric Biederman
+ */
+/*
+ * We use ELF as output format. So that we can
+ * debug the code in some form.
+ */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+
+/*
+ENTRY(_start)
+*/
+
+TARGET(binary)
+SECTIONS
+{
+ . = _ROMBASE;
+
+ /* cut _start into last 64k*/
+ _x = .;
+ . = (_x < (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE)) ? (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE) : _x;
+
+ /* This section might be better named .setup */
+ .rom . : {
+ _rom = .;
+ *(.rom.text);
+ *(.rom.data);
+ *(.init.rodata.*);
+ *(.rodata.*);
+ *(.rom.data.*);
+ . = ALIGN(16);
+ _erom = .;
+ }
+
+ _lrom = LOADADDR(.rom);
+ _elrom = LOADADDR(.rom) + SIZEOF(.rom);
+
+ /DISCARD/ : {
+ *(.comment)
+ *(.note)
+ *(.comment.*)
+ *(.note.*)
+ }
+}