drop "arch/asm.h" and "arch/intel.h" and create "cpu/x86/post_code.h"

(which could at some time hold global post code definitions, too)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5498 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 5 insertions, 62 deletions

diff --git a/src/arch/i386/include/arch/asm.h b/src/arch/i386/include/arch/asm.h
deleted file mode 100644
index f41ec166e2..0000000000
--- a/src/arch/i386/include/arch/asm.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef ASM_H
-#define	ASM_H
-
-#define ASSEMBLER 1
-
-#endif /* ASM_H */
diff --git a/src/arch/i386/include/arch/cpu.h b/src/arch/i386/include/arch/cpu.h
index 47d4baf63b..30b6cc300b 100644
--- a/src/arch/i386/include/arch/cpu.h
+++ b/src/arch/i386/include/arch/cpu.h
@@ -28,6 +28,7 @@ struct cpuid_result {
 	uint32_t ecx;
 	uint32_t edx;
 };
+
 /*
  * Generic CPUID function
  */
@@ -44,7 +45,6 @@ static inline struct cpuid_result cpuid(int op)
 	return result;
 }
 
-
 /*
  * CPUID functions returning a single datum
  */
@@ -58,6 +58,7 @@ static inline unsigned int cpuid_eax(unsigned int op)
 		: "ebx", "ecx", "edx");
 	return eax;
 }
+
 static inline unsigned int cpuid_ebx(unsigned int op)
 {
 	unsigned int eax, ebx;
@@ -68,6 +69,7 @@ static inline unsigned int cpuid_ebx(unsigned int op)
 		: "ecx", "edx" );
 	return ebx;
 }
+
 static inline unsigned int cpuid_ecx(unsigned int op)
 {
 	unsigned int eax, ecx;
@@ -78,6 +80,7 @@ static inline unsigned int cpuid_ecx(unsigned int op)
 		: "ebx", "edx" );
 	return ecx;
 }
+
 static inline unsigned int cpuid_edx(unsigned int op)
 {
 	unsigned int eax, edx;
@@ -89,8 +92,6 @@ static inline unsigned int cpuid_edx(unsigned int op)
 	return edx;
 }
 
-
-
 #define X86_VENDOR_INVALID    0
 #define X86_VENDOR_INTEL      1
 #define X86_VENDOR_CYRIX      2
@@ -112,6 +113,7 @@ struct cpu_device_id {
 	unsigned vendor;
 	unsigned device;
 };
+
 struct cpu_driver {
 	struct device_operations *ops;
 	struct cpu_device_id *id_table;
@@ -141,7 +143,6 @@ static inline unsigned long cpu_index(void)
 	return ci->index;
 }
 
-
 struct cpuinfo_x86 {
         uint8_t    x86;            /* CPU family */
         uint8_t    x86_vendor;     /* CPU vendor */
diff --git a/src/arch/i386/include/arch/intel.h b/src/arch/i386/include/arch/intel.h
deleted file mode 100644
index c6f90cca2e..0000000000
--- a/src/arch/i386/include/arch/intel.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
-This software and ancillary information (herein called SOFTWARE )
-called LinuxBIOS          is made available under the terms described
-here.  The SOFTWARE has been approved for release with associated
-LA-CC Number 00-34   .  Unless otherwise indicated, this SOFTWARE has
-been authored by an employee or employees of the University of
-California, operator of the Los Alamos National Laboratory under
-Contract No. W-7405-ENG-36 with the U.S. Department of Energy.  The
-U.S. Government has rights to use, reproduce, and distribute this
-SOFTWARE.  The public may copy, distribute, prepare derivative works
-and publicly display this SOFTWARE without charge, provided that this
-Notice and any statement of authorship are reproduced on all copies.
-Neither the Government nor the University makes any warranty, express
-or implied, or assumes any liability or responsibility for the use of
-this SOFTWARE.  If SOFTWARE is modified to produce derivative works,
-such modified SOFTWARE should be clearly marked, so as not to confuse
-it with the version available from LANL.
- */
-/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
- * rminnich@lanl.gov
- */
-
-
-#ifndef ROM_INTEL_H
-#define	ROM_INTEL_H
-
-/*
- * Bootstrap code for the Intel
- *
- */
-
-#define RET_LABEL(label)	\
-	jmp label##_done
-
-#define CALL_LABEL(label)	\
-	jmp label		;\
-label##_done:
-
-#define CALLSP(func) \
-	lea	0f, %esp	; \
-	jmp func		; \
-0:
-
-#define RETSP \
-	jmp *%esp
-
-
-#define	post_code(value)	\
-	movb	$value, %al;	\
-	outb	%al, $0x80
-
-#endif /* ROM_INTEL_H */