aboutsummaryrefslogtreecommitdiff
path: root/src/arch/armv7/romstage.ld
diff options
context:
space:
mode:
authorDavid Hendricks <dhendrix@chromium.org>2013-01-17 20:52:21 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-01-19 02:14:18 +0100
commit211a5d56db2ecf580b722fab132d908a6ba84dde (patch)
treedba0bf37b150c61a6eae0e9d3e34522e19460d2f /src/arch/armv7/romstage.ld
parentf572e1e5fca59215461bb9ba3de56882b762b345 (diff)
armv7/snow: get to romstage
This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/armv7/romstage.ld')
-rw-r--r--src/arch/armv7/romstage.ld12
1 files changed, 3 insertions, 9 deletions
diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld
index faf7d6d38a..b4bc29d196 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/armv7/romstage.ld
@@ -24,22 +24,16 @@
INCLUDE ldoptions
*/
-/*
- * FIXME: what exactly should these be? maybe defined on a per-CPU basis?
- * FIXME 2: Somehow linker didn't like CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE...
- */
-/* MEMORY { .sram : ORIGIN = 0x02023400, LENGTH = 0x3800 } */
-/*MEMORY { .sram : ORIGIN = 0x02023400, LENGTH = 0x10000 }*/
-
/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
-/* ENTRY(_start) */
+ENTRY(_start)
SECTIONS
{
- . = 0x02023400 + 0x4000;
+ /* TODO make this a configurable option (per chipset). */
+ . = CONFIG_ROMSTAGE_BASE;
.romtext . : {
_rom = .;