armv7: add new dcache and MMU setup functions

This adds new MMU setup code. Most notably, this version uses
cbmem_add() to determine the translation table base address, which
in turn is necessary to ensure payloads which wipe memory can tell
which regions to wipe out.

TODOs:
- Finish cleaning up references to old cache/MMU stuff
- Add L2 setup (from exynos_cache.c)
- Set up ranges dynamically rather than in ramstage's main().

Change-Id: Iba5295a801e8058a3694e4ec5b94bbe9a69d3ee6
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2877
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

1 files changed, 1 insertions, 6 deletions

diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc
index c248b9ea93..56a1bb72aa 100644
--- a/src/arch/armv7/lib/Makefile.inc
+++ b/src/arch/armv7/lib/Makefile.inc
@@ -3,12 +3,8 @@
 bootblock-y += syslib.c
 bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c
 bootblock-y += cache.c
-bootblock-y += cache_v7.c
-bootblock-y += cache-cp15.c
 
 romstage-y += cache.c
-romstage-y += cache_v7.c
-romstage-y += cache-cp15.c
 romstage-y += div0.c
 romstage-y += syslib.c
 romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
@@ -19,8 +15,7 @@ ramstage-y += div0.c
 #ramstage-y += memset.S
 ramstage-y += syslib.c
 ramstage-y += cache.c
-ramstage-y += cache_v7.c
-ramstage-y += cache-cp15.c
+ramstage-y += mmu.c
 
 #FIXME(dhendrix): should this be a config option?
 romstage-y += eabi_compat.c