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authorDavid Hendricks <dhendrix@chromium.org>2013-02-12 22:57:04 -0800
committerDavid Hendricks <dhendrix@chromium.org>2013-02-13 21:23:34 +0100
commitdc8259ce1d2e866f3133da49c1d6f4773f5698c1 (patch)
tree3ad1b7188277a362f1456e8aa966155d4eb7d2a1 /src/arch/armv7/ldscript_failover.lb
parentb25208fc8bce4142c420afcacd3c16e649fa2a5c (diff)
armv7/exynos: remove some stale files leftover from initial import
This removes some files leftover from the initial port. Some are leftover from U-Boot and some were leftover from the skeleton code derived from x86. There's a bit more that we'll get in another sweep. Change-Id: I325793ecb902b3b9430dcf531714ce025d201de6 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2380 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/armv7/ldscript_failover.lb')
-rw-r--r--src/arch/armv7/ldscript_failover.lb74
1 files changed, 0 insertions, 74 deletions
diff --git a/src/arch/armv7/ldscript_failover.lb b/src/arch/armv7/ldscript_failover.lb
deleted file mode 100644
index 9a3b9aef8e..0000000000
--- a/src/arch/armv7/ldscript_failover.lb
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Advanced Micro Devices, Inc.
- * Copyright (C) 2008-2010 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-
-MEMORY {
- rom : ORIGIN = 0xffff0000, LENGTH = 64K
-}
-
-TARGET(binary)
-SECTIONS
-{
- /* Symbol ap_sipi_vector must be aligned to 4kB to start AP CPUs
- * with Startup IPI message without RAM. Align .rom to next 4 byte
- * boundary anyway, so no pad byte appears between _rom and _start.
- */
- .bogus ROMLOC_MIN : {
- . = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(4096) : ALIGN(4);
- ROMLOC = .;
- } >rom = 0xff
-
- /* This section might be better named .setup */
- .rom ROMLOC : {
- _rom = .;
- ap_sipi_vector = .;
- *(.rom.text);
- *(.rom.data);
- *(.rom.data.*);
- *(.rodata.*);
- _erom = .;
- } >rom = 0xff
-
- /* Allocation reserves extra 16 bytes here. Alignment requirements
- * may cause the total size of a section to change when the start
- * address gets applied.
- */
- ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) -
- (CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0);
-
- /* Post-check proper SIPI vector. */
- _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0),
- "Bad SIPI vector alignment");
- _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector == CONFIG_AP_SIPI_VECTOR),
- "Address mismatch on AP_SIPI_VECTOR");
-
- /DISCARD/ : {
- *(.comment)
- *(.note)
- *(.comment.*)
- *(.note.*)
- *(.iplt)
- *(.rel.*)
- *(.igot.*)
- }
-}