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authorDavid Hendricks <dhendrix@chromium.org>2013-02-08 18:02:31 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-09 05:05:23 +0100
commit1c270b155863e48a2b2a6d855c6b7ea2f38ef8c6 (patch)
tree14afcc73f9f5abaefb2a7d3fea8afef6e556aed8 /src/arch/armv7/include
parent896edc28af423cedbb6eab6d0a83c090e3fb2ef5 (diff)
armv7: update coreboot tables for armv7
This is a first-pass attempt at cleaning up the coreboot tables for ARM. The most noticable difference is that there is no longer both a high and a low table. Change-Id: I5ba87ad57bf9a697b733511182c0326825071617 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2329 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/armv7/include')
-rw-r--r--src/arch/armv7/include/arch/coreboot_tables.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/arch/armv7/include/arch/coreboot_tables.h b/src/arch/armv7/include/arch/coreboot_tables.h
index 3c9bf98f22..ab2086602e 100644
--- a/src/arch/armv7/include/arch/coreboot_tables.h
+++ b/src/arch/armv7/include/arch/coreboot_tables.h
@@ -3,10 +3,11 @@
#include <boot/coreboot_tables.h>
+#define MAX_COREBOOT_TABLE_SIZE (8 * 1024)
+
/* This file holds function prototypes for building the coreboot table. */
unsigned long write_coreboot_table(
- unsigned long low_table_start, unsigned long low_table_end,
- unsigned long rom_table_start, unsigned long rom_table_end);
+ unsigned long table_start, unsigned long table_end);
void lb_memory_range(struct lb_memory *mem,
uint32_t type, uint64_t start, uint64_t size);