soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices

This patch provides option for PCI IRQ mapping in both PIC and APIC mode.

TEST=Build and Boot on CNL RVP.

Change-Id: Ie26750ac9dc2ce940b0c116085c041de439075df
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/28799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

0 files changed, 0 insertions, 0 deletions