diff options
author | Subrata Banik <subrata.banik@intel.com> | 2019-08-29 13:43:30 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-02 20:08:20 +0000 |
commit | 809b7513a21e04f087eaab4bc06be9978826b4a3 (patch) | |
tree | 3bfcb9b68696eecec17b4580bb5e615c87681a20 /src/arch/arm | |
parent | c54dcf499b62ae48c5b8322f3ea9714ebd4d1108 (diff) |
soc/intel/common/timer: Make TSC frequency calculation dynamically
tsc_freq_mhz() had a static table of Intel CPU families and crystal
clock, but it is possible to calculate the crystal clock speed dynamically,
and this is preferred over hardcoded table.
On SKL/KBL/CML CPUID.15h.ecx = nominal core crystal clock = 0 Hz
hence we had to use static table to calculate crystal clock.
Recommendation is to make use of CPUID.16h where crystal clock frequency
was not reported by CPUID.15h to calculate the crystal clock.
BUG=b:139798422, b:129839774
TEST=Able to build and boot KBL/CML/ICL.
Change-Id: If660a4b8d12e54b39252bce62bcc0ffcc967f5da
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35148
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/arm')
0 files changed, 0 insertions, 0 deletions