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authorMartin Roth <martin@coreboot.org>2021-10-01 14:28:22 -0600
committerMartin Roth <martinroth@google.com>2021-10-05 18:06:39 +0000
commit0949e739066c3509e05db2b9ed71cefaaa62205f (patch)
tree797d772f524dd668689f8c2813f3b052e84de434 /src/arch/arm64
parent6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9 (diff)
src/acpi to src/lib: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58080 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/arm64')
-rw-r--r--src/arch/arm64/include/arch/asm.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm64/include/arch/asm.h b/src/arch/arm64/include/arch/asm.h
index e6246c39da..df5952a576 100644
--- a/src/arch/arm64/include/arch/asm.h
+++ b/src/arch/arm64/include/arch/asm.h
@@ -19,7 +19,7 @@
.size name, .-name
/*
- * Certain SoCs have an alignment requiremnt for the CPU reset vector.
+ * Certain SoCs have an alignment requirement for the CPU reset vector.
* Align to a 64 byte typical cacheline for now.
*/
#define CPU_RESET_ENTRY(name) ENTRY_WITH_ALIGN(name, 6)