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authorGang Chen <gang.c.chen@intel.com>2024-05-18 07:46:00 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-07-03 12:09:06 +0000
commitcae81a567462b4ab2494b4e6cee0ee20ea4a2fcf (patch)
tree2fb8fe52e1975c9e12c2858556673cf9ee0ecdf8 /src/arch/arm64
parent409860687baf68ac3f4f27d234f6e08afa6ad309 (diff)
soc/intel/xeon_sp/gnr: Support fast boot
Fast boot will used pre-saved hardware configuration data to accelerate the boot process, e.g. DDR training is skipped by using pre-saved training data. Enable fast boot on cold and warm resets by default. Change-Id: Ib5dc76176b16ea1be5dd9b05a375c9179411f590 Signed-off-by: Gang Chen <gang.c.chen@intel.com> Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82080 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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