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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-10 16:46:18 +0100 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-28 13:39:23 +0000 |
| commit | 42a6f7e417f64a475f6e2b54ea59ee0a733a9c79 (patch) | |
| tree | 8d21e58d01cbda59faaa2e8a87634987d92c55eb /src/arch/arm64/div0.c | |
| parent | b0ab41e0279e47d3bb09d6cddc803686859e6985 (diff) | |
soc/intel/xeon_sp: Lock down DMI3 PCI registers
This is required for CBnT.
Change-Id: If5637eb8dd7de406b24b92100b68c5fa11c16854
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/arch/arm64/div0.c')
0 files changed, 0 insertions, 0 deletions