diff options
| author | Julius Werner <jwerner@chromium.org> | 2015-10-16 13:10:02 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2015-11-17 21:31:20 +0100 |
| commit | 7dcf9d51e5ffadfcf8b5fceddcddb4e1d0a7db37 (patch) | |
| tree | 2860976349922ae1ba54c9a668949c55598469ba /src/arch/arm64/cpu/cortex_a57.S | |
| parent | d3634c108d63d07ce004a66e3abb05e8da57d65b (diff) | |
arm64: tegra132: tegra210: Remove old arm64/stage_entry.S
This patch removes the old arm64/stage_entry.S code that was too
specific to the Tegra SoC boot flow, and replaces it with code that
hides the peculiarities of switching to a different CPU/arch in ramstage
in the Tegra SoC directories.
BRANCH=None
BUG=None
TEST=Built Ryu and Smaug. !!!UNTESTED!!!
Change-Id: Ib3a0448b30ac9c7132581464573efd5e86e03698
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/12078
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/arm64/cpu/cortex_a57.S')
| -rw-r--r-- | src/arch/arm64/cpu/cortex_a57.S | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/src/arch/arm64/cpu/cortex_a57.S b/src/arch/arm64/cpu/cortex_a57.S deleted file mode 100644 index 80707caadf..0000000000 --- a/src/arch/arm64/cpu/cortex_a57.S +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/asm.h> -#include <cpu/cortex_a57.h> - -ENTRY(arm64_cpu_early_setup) - mrs x0, CPUECTLR_EL1 - orr x0, x0, #(1 << SMPEN_SHIFT) - msr CPUECTLR_EL1, x0 - isb - ret -ENDPROC(arm64_cpu_early_setup) |