diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-09-06 02:31:30 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:05:20 +0100 |
commit | 9fd4dc73bc1fb0fc7d146c6bf2d0e6a9db1fc22c (patch) | |
tree | bb659d35aeba31c47cfe77c872cadebf41c3ada4 /src/arch/arm64/c_entry.c | |
parent | 27d4266a44a2a39a589145dd234526f94a206eec (diff) |
arm64: add devicetree based CPU startup
This adds SMP bring up support for arm64 cpus. It's
reliant on DEVICE_PATH_CPU devices in the devicetree.
Then for each enabled device it attempts to start then
initialize each CPU. Additionally, there is a cpu_action
construct which allows for running actions on an individual
cpu.
BUG=chrome-os-partner:31761
BRANCH=None
TEST=Booted both cores on ryu into linux.
Change-Id: I3e42fb668034c27808d706427a26be1558ad2af1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a733fd566a8e5793da5ff28f9c16c213f411372e
Original-Change-Id: I407eabd0b6985fc4e86de57a9e034548ec8f3d81
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/216925
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9042
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm64/c_entry.c')
-rw-r--r-- | src/arch/arm64/c_entry.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/src/arch/arm64/c_entry.c b/src/arch/arm64/c_entry.c index e2aa4e5fb3..aba9fd3719 100644 --- a/src/arch/arm64/c_entry.c +++ b/src/arch/arm64/c_entry.c @@ -70,12 +70,18 @@ static void secondary_cpu_start(void) { mmu_enable(); exception_hwinit(); - soc_secondary_cpu_init(); - /* - * TODO(adurbin): need a proper place to park the CPUs. Currently - * assuming SoC code does the appropriate thing. - */ - while (1); + + if (!IS_ENABLED(CONFIG_SMP)) { + soc_secondary_cpu_init(); + /* + * TODO(adurbin): need a proper place to park the CPUs. + * Currently assuming SoC code does the appropriate thing. + */ + while (1); + } + + /* This will never return. */ + arch_secondary_cpu_init(); } extern void arm64_cpu_startup(void); |