diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-09-17 11:43:20 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 07:05:13 +0100 |
| commit | 5add43574dc10b9df3b8d050ce9ef14540e339a8 (patch) | |
| tree | af7cfb1c5bf7b058f30887fee1b3de7eeb20f2a9 /src/arch/arm64/boot.c | |
| parent | 74ff69feefaf3a34ad458ee641c68e1b62edd8f5 (diff) | |
arm64: add spin table support
There was a hacky and one-off spin table support in tegra132.
Make this support generic for all arm64 chips.
BUG=chrome-os-partner:32082
BRANCH=None
TEST=Ran with and without secure monitor booting smp into the kernel.
Change-Id: I3425ab0c30983d4c74d0aa465dda38bb2c91c83b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 024dc3f3e5262433a56ed14934db837b5feb1748
Original-Change-Id: If12083a9afc3b2be663d36cfeed10f9b74bae3c8
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218654
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9084
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm64/boot.c')
| -rw-r--r-- | src/arch/arm64/boot.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 6307e6005b..01630f376b 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -21,6 +21,7 @@ #include <arch/lib_helpers.h> #include <arch/secmon.h> #include <arch/stages.h> +#include <arch/spintable.h> #include <arch/transition.h> #include <cbmem.h> #include <console/console.h> @@ -38,6 +39,9 @@ void arch_payload_run(const struct payload *payload) secmon_run(payload_entry, cb_tables); + /* Start the other CPUs spinning. */ + spintable_start(); + /* If current EL is not EL3, jump to payload at same EL. */ if (current_el != EL3) { cache_sync_instructions(); |