diff options
author | Furquan Shaikh <furquan@google.com> | 2014-06-11 14:48:37 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2015-02-25 20:01:44 +0100 |
commit | 26a8747ccaa1bf799cfb03c8ccaaf4205196f108 (patch) | |
tree | eaef5106fe8ffff05a54b81602e1fdcb65195770 /src/arch/arm64/armv8/lib/misc.c | |
parent | 595a40cfc92baecca9c58a7a95ae38ce72582f39 (diff) |
coreboot arm64: Add library for system access
Add support for library functions required to access different system registers:
1) PSTATE and special purpose registers
2) System control registers
3) Cache-related registers
4) TLB maintenance registers
5) Misc barrier related functions
BUG=None
BRANCH=None
TEST=Compiles successfully
Original-Change-Id: I8809ca2b67b8e560b34577cda1483ee009a1d71a
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/203490
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 5da840c5d1f3d8fdf8cc0d7c44772bf0cef03fbb)
armv8: GPL license armv8 lib
BUG=None
BRANCH=None
TEST=Compiles successfully.
Original-Change-Id: Ibe0f09ef6704ad808cc482ffec27a4db32d7f6fd
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/250950
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit bc115869bb0bcedbc284677ca5743b9ab40bfc7e)
Get the library and the GPL license in a single commit.
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I4753a6b0d13a6f7515243bfa8e749e250fdd749d
Reviewed-on: http://review.coreboot.org/8465
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/arch/arm64/armv8/lib/misc.c')
-rw-r--r-- | src/arch/arm64/armv8/lib/misc.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/src/arch/arm64/armv8/lib/misc.c b/src/arch/arm64/armv8/lib/misc.c new file mode 100644 index 0000000000..da02a331b0 --- /dev/null +++ b/src/arch/arm64/armv8/lib/misc.c @@ -0,0 +1,58 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Reference: ARM Architecture Reference Manual, ARMv8-A edition + * misc.c: Memory barrier functions + */ + +#include <stdint.h> + +#include <arch/lib_helpers.h> + + +/* + * Sync primitives + */ + +/* data memory barrier */ +void dmb(void) +{ + asm volatile ("dmb sy" : : : "memory"); +} + +/* data sync barrier */ +void dsb(void) +{ + asm volatile ("dsb sy" : : : "memory"); +} + +/* instruction sync barrier */ +void isb(void) +{ + asm volatile ("isb sy" : : : "memory"); +} |