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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-07-14 09:52:00 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 18:21:54 +0200 |
| commit | 89e7b49a114f60f2fddf5f409dea0025785d4604 (patch) | |
| tree | afefa7d92b76026ee6da60119cd23430b78272e4 /src/arch/arm/memcpy.S | |
| parent | d779605c29a1630a256c8a1c4966214c580481ec (diff) | |
soc/intel/apollolake: Consolidate ISH enabling
Since the Integrated Sensor Hub can be disabled through devicetree.cb
as a PCI device, there is no need for a separate register variable.
Remove handling the register and update mainboards' devicetrees. Also
keep ISH disabled on both Reef and Amenia.
Change-Id: I90dbf57b353ae1b80295ecf39877b10ed21de146
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15710
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/arm/memcpy.S')
0 files changed, 0 insertions, 0 deletions