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author | Arthur Heymans <arthur@aheymans.xyz> | 2022-06-03 17:54:56 +0200 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2024-01-31 16:14:38 +0000 |
commit | 789adfabb722cec627d29c6320c996de44169f86 (patch) | |
tree | 62999cd29af3a5fbf997aeb4ef94f54b53e71fe1 /src/arch/arm/libgcc | |
parent | 61ec6e9fa944567022a135723e13d99516ef4481 (diff) |
soc/amd/noncar/memlayout.ld: Warn about incorrect reset vector
The x86 core always starts with an IP at 0xfff0. This needs to match in
the code.
Change-Id: Ibced50e4348a2b46511328f9b3f3afa836feb9a5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/arch/arm/libgcc')
0 files changed, 0 insertions, 0 deletions