diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-12 15:23:25 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-28 08:59:11 +0000 |
| commit | ae7ac8a72372e4099bcf0667b5f97b4a223da48d (patch) | |
| tree | ae4d809a4cfa01711a76da4a5b5ca234f80ff778 /src/acpi | |
| parent | fa5f9b5aff2279d6304a8b197e12714934025575 (diff) | |
ACPI: Separate ChromeOS NVS in ASL
For builds with MAINBOARD_HAS_CHROMEOS=y but CHROMEOS=n, there
is reduced dsdt.aml size and reduced GNVS allocation from cbmem.
More importantly, it's less error-prone when the OperationRegion
size is not hard-coded inside the .asl files.
Change-Id: I54b0d63a41561f9a5d9ebde77967e6d21ee014cd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49477
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/acpi')
| -rw-r--r-- | src/acpi/acpigen_extern.asl | 6 | ||||
| -rw-r--r-- | src/acpi/dsdt_top.asl | 4 | ||||
| -rw-r--r-- | src/acpi/gnvs.c | 11 |
3 files changed, 19 insertions, 2 deletions
diff --git a/src/acpi/acpigen_extern.asl b/src/acpi/acpigen_extern.asl index 73d626fbea..5e380b5039 100644 --- a/src/acpi/acpigen_extern.asl +++ b/src/acpi/acpigen_extern.asl @@ -18,3 +18,9 @@ External (NVB1, IntObj) External (NVS1, IntObj) OperationRegion (DNVS, SystemMemory, NVB1, NVS1) #endif + +#if CONFIG(CHROMEOS) +External (NVB2, IntObj) +External (NVS2, IntObj) +OperationRegion (CNVS, SystemMemory, NVB2, NVS2) +#endif diff --git a/src/acpi/dsdt_top.asl b/src/acpi/dsdt_top.asl index 761c1b541d..8dceb6ae27 100644 --- a/src/acpi/dsdt_top.asl +++ b/src/acpi/dsdt_top.asl @@ -1,3 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpigen_extern.asl> + +#if CONFIG(CHROMEOS) +#include <vendorcode/google/chromeos/acpi/gnvs.asl> +#endif diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index 010b0e0149..4da830a5ad 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -41,7 +41,7 @@ void acpi_create_gnvs(void) gnvs_size = 0x100; if (CONFIG(ACPI_HAS_DEVICE_NVS)) gnvs_size = 0x2000; - else if (CONFIG(MAINBOARD_HAS_CHROMEOS)) + else if (CONFIG(CHROMEOS)) gnvs_size = 0x1000; gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, gnvs_size); @@ -72,9 +72,16 @@ void acpi_fill_gnvs(void) acpigen_write_scope("\\"); acpigen_write_name_dword("NVB0", (uintptr_t)gnvs); - acpigen_write_name_dword("NVS0", CONFIG(MAINBOARD_HAS_CHROMEOS) ? 0x1000 : 0x100); + acpigen_write_name_dword("NVS0", 0x100); acpigen_pop_len(); + if (CONFIG(CHROMEOS)) { + acpigen_write_scope("\\"); + acpigen_write_name_dword("NVB2", (uintptr_t)gnvs + GNVS_CHROMEOS_ACPI_OFFSET); + acpigen_write_name_dword("NVS2", 0xf00); + acpigen_pop_len(); + } + if (CONFIG(ACPI_HAS_DEVICE_NVS)) { acpigen_write_scope("\\"); acpigen_write_name_dword("NVB1", (uintptr_t)gnvs + GNVS_DEVICE_NVS_OFFSET); |