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author | Felix Held <felix-coreboot@felixheld.de> | 2023-04-28 17:30:59 +0200 |
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committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-05-03 16:15:38 +0000 |
commit | 662d7af70bc8e060921f57aaec328619382b4852 (patch) | |
tree | 8253e813ab34e1a46ab4591cbbce1c414109e063 /src/acpi/sata.c | |
parent | 22b226724e71822d81d142a866f892dd0949e954 (diff) |
soc/amd/common/block/lpc/lpc: report mapped SPI flash as MMIO range
Since the 16MByte of memory-mapped SPI flash region right below the 4GB
boundary is both a fixed region and isn't decoded on a device below the
LPC device, but assumed to be decoded by the LPC device itself, it
shouldn't be reported as a subtractive resource, but as an MMIO resource
instead.
TEST=On mandolin the 16MByte MMIO-mapped SPI flash now show up as a
reserved region in the e820 memory map which wasn't the case before:
13. 00000000ff000000-00000000ffffffff: RESERVED
The Linux kernel doesn't show any new or possibly related errors.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Change-Id: Ib52df2b2d79a1e6213c3499984a5a1e0e25c058a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74839
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/acpi/sata.c')
0 files changed, 0 insertions, 0 deletions