diff options
| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-11-04 10:23:15 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-09 07:28:19 +0000 |
| commit | 8e57299a0da5dc9928b97d94b0265cf6883de005 (patch) | |
| tree | 30c4926b1e38be73e8837b02817c5fbb6d89d8c4 /src/acpi/device.c | |
| parent | ac12976f0c411c1b337bf9a9619b2b54e81f362b (diff) | |
mb/intel/jasperlake_rvp: Update Power Limit2 minimum value
Update Power Limit2 (PL2) minimum value to the same as maximum value for
jasperlake rvp board. DTT does not throttle PL2, so this minimum value
change here does not impact any existing behavior on the system.
BUG=None
BRANCH=None
TEST=Build and test on jasperlake rvp board
Change-Id: I862f7106846de5fb37f74419807eedc3096ded8a
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47201
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/acpi/device.c')
0 files changed, 0 insertions, 0 deletions