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authorXi Chen <xixi.chen@mediatek.corp-partner.google.com>2022-08-18 11:23:26 +0800
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-08-31 16:43:51 +0000
commitdf0396149aba5171d64b9fbab0856dc9f07b1c15 (patch)
tree4350d24966f228a759e46f617430a13cb8aea0dc /src/acpi/acpigen_extern.asl
parentcd37368c6c8b18dc73e90dc964eb581162d5a1ed (diff)
soc/mediatek/mt8188: Support 4 channel DRAM in DPM init flow
TEST=build pass BUG=b:236331724 Signed-off-by: Xi Chen <xixi.chen@mediatek.corp-partner.google.com> Change-Id: Ia68aca1d1e8729739246157904727123e5d001e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66968 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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