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authorDavid Milosevic <David.Milosevic@9elements.com>2023-09-22 14:34:28 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2023-12-02 19:16:26 +0000
commitd982274a4ecc8ed6b42724d03332d06d50393109 (patch)
treee21488faa5cac62c9b40b209a02ed6da55d0f88c /src/acpi/Makefile.inc
parentfaf277995999179794d0a571ffc02faaee363c79 (diff)
acpi: Add PPTT support
This patch adds code to generate Processor Properties Topology Tables (PPTT) compliant to the ACPI 6.4 specification. - The 'acpi_get_pptt_topology' hook is mandatory once ACPI_PPTT is selected. Its purpose is to return a pointer to a topology tree, which describes the relationship between CPUs and caches. The hook can be provided by, for example, mainboard code. Background: We are currently working on mainboard code for qemu-sbsa and Neoverse N2. Both require a valid PPTT table. Patch was tested against the qemu-sbsa board. Change-Id: Ia119e1ba15756704668116bdbc655190ec94ff10 Signed-off-by: David Milosevic <David.Milosevic@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78071 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/acpi/Makefile.inc')
-rw-r--r--src/acpi/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/acpi/Makefile.inc b/src/acpi/Makefile.inc
index cb0bbb4eb2..6bb34cb29d 100644
--- a/src/acpi/Makefile.inc
+++ b/src/acpi/Makefile.inc
@@ -8,6 +8,7 @@ ramstage-y += acpi_apic.c
ramstage-y += acpi_dmar.c
ramstage-y += acpi_hpet.c
endif
+ramstage-$(CONFIG_ACPI_PPTT) += acpi_pptt.c
ramstage-y += acpigen.c
ramstage-y += acpigen_dptf.c
ramstage-y += acpigen_dsm.c