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authorJeremy Compostella <jeremy.compostella@intel.com>2024-09-25 10:06:49 -0700
committerSubrata Banik <subratabanik@google.com>2024-10-05 10:04:49 +0000
commit5052271f52c9e293edd978a20e86e78fe932585e (patch)
tree53885c20ec687bc682149425ba17db00619d9e8a /src/Kconfig
parentd6a4b27e3e5b0b3b872a002a5f3b3e7cb377be3d (diff)
soc/intel/pantherlake: Add FSP-S programming
FSP-S UPDs are programmed according to the configuration (Kconfig and device tree) in ramstage. BUG=348678529 TEST=Hardware is programmed as desired and Intel Panther Lake reference board boots to UI. Change-Id: Iea26d962748116fa84afdb4afcba1098a64b6989 Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84552 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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