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authorSimon Glass <sjg@chromium.org>2018-07-12 15:26:07 -0600
committerPatrick Georgi <pgeorgi@google.com>2018-07-16 07:41:14 +0000
commit46255f7ee4728e0ee02c0cb8d9edeeee1a8e5361 (patch)
tree61f626813cc3f3f9f4400b7c00bbcaef552faf68 /src/Kconfig
parent457253cdc6cac0eeef47c2dd4fbd2f93e1d34ef2 (diff)
Kconfig: Make the EM100 config option common
This applied to AMD devices as well as Intel, although the mechanism is different. Move the option to a common place. BUG=b:111363976 TEST=USE=em100-mode emerge-reef coreboot See that a message appears: * Enabling em100 mode (slow SPI flash) Change-Id: Iea437bdf42e7bc49b1d28c812bfc6128e3eb68bd Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://review.coreboot.org/27467 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/Kconfig')
-rw-r--r--src/Kconfig18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 24b21060b6..bce3e32884 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -1024,6 +1024,24 @@ config DEBUG_ADA_CODE
Add the compiler switch `-gnata` to compile code guarded by
`pragma Debug`.
+config HAVE_EM100_SUPPORT
+ bool "Platform can support the Dediprog EM100 SPI emulator"
+ help
+ This is enabled by platforms which can support using the EM100.
+
+config EM100
+ bool "Configure image for EM100 usage"
+ depends on HAVE_EM100_SUPPORT
+ help
+ The Dediprog EM100 SPI emulator allows fast loading of new SPI images
+ over USB. However it only supports a maximum SPI clock of 20MHz and
+ single data output. Enable this option to use a 20MHz SPI clock and
+ disable "Dual Output Fast Read" Support.
+
+ On AMD platforms this changes the SPI speed at run-time if the
+ mainboard code supports this. On supported Intel platforms this works
+ by changing the settings in the descriptor.bin file.
+
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