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| author | Jeremy Soller <jeremy@system76.com> | 2023-06-20 14:35:48 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-31 14:01:27 +0000 |
| commit | c4731fa9ee122fe0ac7ae3f1f05c667cb895e2a5 (patch) | |
| tree | cb8625da5555bfbff45ea88fcf7340b0e0742752 /spd | |
| parent | ee004de9691ff52eeebb492273bd5ac1d85c7006 (diff) | |
soc/intel/alderlake: Allow channel 0 for DDR5 memory-down
This matches the change done for DDR4 in commit 8509c25eece8
("soc/intel/alderlake: Allow channel 0 for memory-down").
Fixes detection of the on-board RAM (Samsung M425R1GB4BB0-CQKOD) on the
System76 Lemur Pro 12 (Clevo L140AU). The Clevo L140*U are the only
boards in the tree using mixed memory topology.
Change-Id: I395f898472a9a8f857fd6b0564b95c787b96080b
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75285
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'spd')
0 files changed, 0 insertions, 0 deletions