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authorMario Scheithauer <mario.scheithauer@siemens.com>2023-07-04 15:41:35 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-07-06 13:55:43 +0000
commit0ec7a9f1740003e013c1f26262efef3734aebeb1 (patch)
tree1cf1313889494a2cc0367c7ecabe4625343c6aaf /spd
parent81fb981e8ecec077674b5d3bce823b0efd9459cc (diff)
mb/siemens/mc_ehl4: Make DRAM population depending on GPIO GPP_B5
GPIO GPP_B5 is used as input on this mainboard. For a full-populated DRAM configuration, the input signal is connected to ground and for a half-populated configuration it is connected to 3.3 V. BUG=none TEST=Use different HW configurations and check coreboot log GPP_B5 = 0: [DEBUG] 2 DIMMs found GPP_B5 = 1: [INFO ] meminit_channels: DRAM half-populated [DEBUG] 1 DIMMs found Change-Id: I48b4a3bea7f1ff804b78b7c648a7ea1925627b8a Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76245 Reviewed-by: Jan Samek <jan.samek@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'spd')
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