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author | Elyes Haouas <ehaouas@noos.fr> | 2022-02-17 18:14:08 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-18 23:23:07 +0000 |
commit | a1f5ad084966a400b7c2df33b2de857afdcbfc51 (patch) | |
tree | 6c22662bdddd58a9c8e647e665bd9cd4fd184cce /spd/lp5/memory_parts.json | |
parent | e284ca26bf57c9a0c660c77f1b1ba906afef9952 (diff) |
nb/amd/pi/00730F01/northbridge.c: Use 'pci_{and,or}_config'
Change-Id: Ifd77c90fe82e20df91562fccea8b5d89dd4a193d
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'spd/lp5/memory_parts.json')
0 files changed, 0 insertions, 0 deletions