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authorSubrata Banik <subratabanik@google.com>2024-07-12 17:11:05 +0000
committerSubrata Banik <subratabanik@google.com>2024-07-13 17:54:41 +0000
commit67d01fd7add32d3bda59e88eb5c506ed1be6b9da (patch)
tree957521b61f00371f75455541da3f859050b67d40 /payloads
parent5e21a96efc8be35033cc8f8ea0c929bb43edb3c6 (diff)
libpayload: Unconditionally handle "CBMEM_ID_CSE_*" entries
This change removes the unnecessary conditional compilation around CBMEM_ID_CSE_BP_INFO and CBMEM_ID_CSE_INFO handling in cb_parse_cbmem_entry. These CBMEM IDs are only relevant on platforms with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD enabled, and platforms without this config option won't encounter these IDs when calling cb_parse_cbmem_entry(). BUG=b:305898363 TEST=Builds and boots successfully: * google/rex0 with SOC_INTEL_CSE_LITE_SKU * google/rex64 with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD Change-Id: Icf056f8426015e99509be5f5a67cb66468645cd9 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83436 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Diffstat (limited to 'payloads')
-rw-r--r--payloads/libpayload/libc/coreboot.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index 1d914c5b76..7873426473 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -262,14 +262,12 @@ static void cb_parse_cbmem_entry(void *ptr, struct sysinfo_t *info)
case CBMEM_ID_MEM_CHIP_INFO:
info->mem_chip_base = cbmem_entry->address;
break;
-#if CONFIG(SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD)
case CBMEM_ID_CSE_BP_INFO:
info->cse_bp_info = cbmem_entry->address;
break;
case CBMEM_ID_CSE_INFO:
info->cse_info = cbmem_entry->address;
break;
-#endif
default:
break;
}