aboutsummaryrefslogtreecommitdiff
path: root/payloads
diff options
context:
space:
mode:
authorTim Chu <Tim.Chu@quantatw.com>2022-12-08 11:05:36 +0000
committerFelix Held <felix-coreboot@felixheld.de>2023-01-24 12:48:18 +0000
commit2ccbcc560f01a7cd646b5012c3f680623c43ef96 (patch)
tree0e160a153bb1cc1e6f88ddbaee891d47b9e68857 /payloads
parent1364ac3478c69affce32840d92577f5a8da2eb8c (diff)
soc/intel/cmn/block: Add smbus/p2sb device ids for SPR-SP
Intel SPR-SP (Sapphire Rapids Scalable Processor) was product launched on Jan. 10, 2023. The chipset includes Emmitsburg PCH. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Change-Id: I05ed8f753bf63b6cb3035e973eb6a7974edfd673 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71944 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'payloads')
0 files changed, 0 insertions, 0 deletions