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author | Taniya Das <tdas@codeaurora.org> | 2021-06-23 09:08:57 +0530 |
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committer | Shelley Chen <shchen@google.com> | 2021-09-03 06:04:18 +0000 |
commit | d37aeb1bcbd8950806bec3c0b83337c8beecdfa1 (patch) | |
tree | b0dd7ba5214b63c3ed394f00e74767460c0c3175 /payloads/nvramcui | |
parent | 310edec6177445a69968a7b8c7a9a89252f58008 (diff) |
soc/qualcomm/common: clock: Add support for common clock driver
The clock driver supports configuring the general purpose PLLs,
configuring the root clock generator (RCG), enable clock branch, enable
gdsc and also the block resets.
The common clock driver exposes PLL configuration functions and also
different Agera PLL enable functions for the CPU PLLs.
While at it, the common driver also supports reset of subsystems like
AOP and SHRM.
SC7180 clock driver is also refactored to use the common clock
driver APIs.
BUG=b:182963902
TEST=Validated on qualcomm sc7180 and sc7280 development board.
Change-Id: I03d1b4a2fb90303c7259ec08f312d78b4e33ec39
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'payloads/nvramcui')
0 files changed, 0 insertions, 0 deletions