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authorAnil Kumar <anil.kumar.k@intel.com>2020-07-17 14:08:01 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-07-26 21:09:51 +0000
commitb3b13efde6f7cb61fe7633f6957ae61dc1461a5d (patch)
treefa94fb468e3e440424d2ad1f11b12c539e0adf6f /payloads/libpayload
parent5ffb5a76c605e493d714bbbe53b0f699854c7289 (diff)
mb/intel/tglrvp: Update MAINBOARD_PART_NUMBER
- Update MAINBOARD_PART_NUMBER for TGL variants - MAINBOARD_PART_NUMBER is reported as FRID on acpi - This is required for cros_config to differentiate across TGL variants. - Mosys uses cros_config to identify TGL variants using data read from FRID Bug=none Test=build and boot coreboot on TGLRVP UP3 hardware Signed-off-by: Anil Kumar <anil.kumar.k@intel.com> Change-Id: I11d4ab2a5b6ade6c50988a9fec4d9866fe79d7b5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43620 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
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