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authorMartin Roth <martin@coreboot.org>2020-06-23 22:15:33 -0600
committerMartin Roth <martinroth@google.com>2020-07-08 20:42:07 +0000
commit137f86149e37ff18b1837860aef1971eec06f0a1 (patch)
treeafaa581a0b047490807254be4bbee237aa6825f0 /payloads/libpayload
parentd09b9747e77e6309fbd53bd9b7260fce0e77867c (diff)
soc/amd/common: Don't init SMIs or SCIs in psp_verstage
We can't set the SMI or SCI flags in psp verstage, so skip them. TEST=Build BUG=b:154142138 Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I40eb464cde6b233607de1e177702c643ea2b4bb2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42765 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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