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authorMichael Niewöhner <foss@mniewoehner.de>2020-08-03 15:01:18 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2020-09-21 14:51:00 +0000
commit30c5d21891c67e73c6522e125568e74c40465a7d (patch)
tree02663065e6f1372973e4fc093a80dc081694b92b /payloads/libpayload/liblzma
parentfa0080d187c8086d28bcad7c33bac66f624aa753 (diff)
soc/intel/skylake: acpi: drop HWP's dependency on EIST
Enhanced Intel SpeedStep Technology (EIST) and Intel Speed Shift Technology (ISST) - also know as HWP - are two independent mechanisms for controlling voltage and frequency based on performance hints. When HWP is enabled, it overrides the software-based EIST. It does not depend on EIST, though, but can be enabled on its own. Break up that currently existing dependency in ACPI generation code. It was tested that HWP can be enabled and gets used by the Linux pstate cpufreq driver. With HWP disabled, the frequency does not decrease, even not in powersave mode. After enabling HWP the frequency changed in relation to the current workload. (Test device: Acer ES1-572) Change-Id: I93d888ddce7b54e91b54e5b4fdd4d9cf16630eda Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44137 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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