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authorFurquan Shaikh <furquan@google.com>2021-06-17 22:14:13 -0700
committerFurquan Shaikh <furquan@google.com>2021-06-18 18:38:14 +0000
commitbda86bd4974ceb279392711617eec48f37306717 (patch)
tree708fef5d07d0b25d49b030afe7cf91b83577ceb0 /payloads/libpayload/libc/coreboot.c
parent5f2141519ba6e7855d1b2e520fa23b9176394462 (diff)
nvs: Add Chrome OS NVS (CNVS) information to coreboot tables
CB:51638 separated Chrome OS NVS from global NVS by allocating it separately in CBMEM. CNVS is used in depthcharge to fill firmware information at boot time. Thus, location of CNVS needs to be shared in coreboot tables for depthcharge to use. This change adds a new coreboot table tag `CB_TAG_ACPI_CNVS`/`CB_TAG_ACPI_CNVS`(0x41) which provides the location of CNVS in CBMEM to payload (depthcharge). Additionally, CB:51639 refactored device nvs(DNVS) and moved it to the end of GNVS instead of the fixed offset 0x1000. DNVS is used on older Intel platforms like baytrail, braswell and broadwell and depthcharge fills this at boot time as well. Since DNVS is no longer used on any new platforms, this information is not passed in coreboot tables. Instead depthcharge is being updated to use statically defined offsets for DNVS. BUG=b:191324611, b:191324611 TEST=Verified that `crossystem fwid` which reads fwid information from CNVS is reported correctly on brya. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I3815d5ecb5f0b534ead61836c2d275083e397ff0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55665 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/libc/coreboot.c')
-rw-r--r--payloads/libpayload/libc/coreboot.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index 7e23afe2e5..269275d604 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -143,6 +143,11 @@ static void cb_parse_acpi_gnvs(unsigned char *ptr, struct sysinfo_t *info)
info->acpi_gnvs = get_cbmem_addr(ptr);
}
+static void cb_parse_acpi_cnvs(unsigned char *ptr, struct sysinfo_t *info)
+{
+ info->acpi_cnvs = get_cbmem_addr(ptr);
+}
+
static void cb_parse_board_config(unsigned char *ptr, struct sysinfo_t *info)
{
struct cb_board_config *const config = (struct cb_board_config *)ptr;
@@ -380,6 +385,9 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_ACPI_GNVS:
cb_parse_acpi_gnvs(ptr, info);
break;
+ case CB_TAG_ACPI_CNVS:
+ cb_parse_acpi_cnvs(ptr, info);
+ break;
case CB_TAG_BOARD_CONFIG:
cb_parse_board_config(ptr, info);
break;