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authorSubrata Banik <subratabanik@google.com>2022-04-25 16:59:35 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-04-29 15:12:52 +0000
commitc176fc2dfb2d313054d08813c644752eeb704efd (patch)
treec6ed673d48d719b28d08377ba63bb070bcbfb426 /payloads/libpayload/include/exception.h
parent09106f75f1c196d97fbc5fa998bfe1e602091266 (diff)
soc/intel: Decouple HECI disabling interface from HECI disable Kconfig
This patch decouples HECI disabling interface a.k.a SMM or PCR or PMC IPC etc. from DISABLE_HECI1_AT_PRE_BOOT kconfig as Intel ME BWG recommends to disable the CSE PCI device while CSE is in software temporary disable state. BUG=b:228789015 TEST=Able to build google/redrix. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I66abc04d5e195515165a77b0166d004f17d029e7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'payloads/libpayload/include/exception.h')
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