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authorGaggery Tsai <gaggery.tsai@intel.com>2020-05-19 21:43:42 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-09 06:30:40 +0000
commit342a8c3b2bc0845638e852af01f3054256a8446c (patch)
treecb020003d78c8568ac702ffb5f336b8385b7b13e /payloads/libpayload/include/compiler.h
parentbe242788c23fe3ee1ac1e5585584969deb50def4 (diff)
mb/google/hatch/vr/puff: Set up PL2 and PsysPL2
This patch adds correct PL2 baseline setting and PsysPL2 for different SKUs. There is no way to identify the barral jack power rating, the assumption is following that ships with the product: 1. i3/i5/i7: 90W BJ 2. Celeron/Pentium: 65W BJ For Type-C adapter, we don't have Pcritcial (10ms) data, keeps the original settings as 90% of adapter rating for PsyspL2/PL4 and PL2 as min(PL2, 0.9n) where n is adapter rating power. BUG=b:143246320 TEST=Run with U62 and Celeron CPU and ensure the PL2 settings are correct Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Change-Id: If7de614d58366158a566563990ee1ecc8c0110bc Reviewed-on: https://review.coreboot.org/c/coreboot/+/41555 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'payloads/libpayload/include/compiler.h')
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