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authorPatrick Georgi <pgeorgi@google.com>2021-01-29 14:08:48 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-01-30 20:17:47 +0000
commit60f5328c7d4991d3fe9e4c0243f89f49e231f856 (patch)
tree511f0d1b645100f0a51e69d940223a69695c9598 /payloads/libpayload/include/arm/arch
parentadac6f40f25eb5914ca4a915ffcff170bc3d50fc (diff)
libpayload/arm*: Add 64bit memory access primitives
Add read64 and write64 for consistency with x86. BUG=b:178785769 Change-Id: I342e3a23201d0b804ea5ecfe47ee3e4bb516de4c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'payloads/libpayload/include/arm/arch')
-rw-r--r--payloads/libpayload/include/arm/arch/io.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/payloads/libpayload/include/arm/arch/io.h b/payloads/libpayload/include/arm/arch/io.h
index 6d549dedd1..ce48baf72e 100644
--- a/payloads/libpayload/include/arm/arch/io.h
+++ b/payloads/libpayload/include/arm/arch/io.h
@@ -98,6 +98,12 @@ static inline uint32_t read32(const void *addr)
return *(volatile uint32_t *)addr;
}
+static inline uint64_t read64(const void *addr)
+{
+ dmb();
+ return *(volatile uint64_t *)addr;
+}
+
static inline void write8(void *addr, uint8_t val)
{
dmb();
@@ -119,4 +125,11 @@ static inline void write32(void *addr, uint32_t val)
dmb();
}
+static inline void write64(void *addr, uint64_t val)
+{
+ dmb();
+ *(volatile uint64_t *)addr = val;
+ dmb();
+}
+
#endif