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authorJulius Werner <jwerner@chromium.org>2018-02-14 18:01:27 -0800
committerJulius Werner <jwerner@chromium.org>2018-02-16 00:08:00 +0000
commit9ec6928b8c7bfdd3bed4eb233672e74f6914ebb6 (patch)
treec5882b25f841623ed7f642a89524605fa13ef344 /payloads/libpayload/drivers/udc
parent3f0c7242c9933fba9c6c7d91a96fb75a88aaef15 (diff)
google/gru: Fix GPIO_WP pull and polarity for Scarlet
Turns out the write-protect GPIO polarity for Scarlet is different than for Kevin/Gru, and nobody ever told us. Also, it must not be configured with an internal pull-up or we'll not read the correct value. This patch fixes both issues. BRANCH=scarlet BUG=b:73356326 TEST=Booted Scarlet, confirmed that crossystem wpsw_boot returns the right value in all cases. Change-Id: Idd348ecdf9da8fff7201b83e869ba097b8570f32 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/23767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'payloads/libpayload/drivers/udc')
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