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authorMatt Papageorge <matthewpapa07@gmail.com>2020-07-30 15:22:46 -0500
committerFurquan Shaikh <furquan@google.com>2020-08-28 17:50:50 +0000
commitb87effe1dde3cc3f81a6afef073009ba808e11a7 (patch)
tree5c7af146e915094379da2ff00aa46af2e76c7c67 /payloads/libpayload/drivers/udc/dwc2.c
parentb1c7ed326a2f49997fef537f925e8fb883dc3d0c (diff)
soc/amd/picasso/romstage: Set SATA enable UPD if controller is enabled
FSP has recently added support for a UPD switch to power gate SATA. This change adds the coreboot side of the feature. To avoid having two SATA enable options, the value of the sata_enable UPD is determined by the enable state of the AHCI controller in the platform devicetree. BUG=b:162302027 BRANCH=zork TEST=Verify AHCI controller can be hidden/disabled. Change-Id: I48bf94a7e6249db6079a6e3de7456a536d54a242 Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44067 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/drivers/udc/dwc2.c')
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