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authorJulius Werner <jwerner@chromium.org>2016-05-16 15:39:12 -0700
committerJulius Werner <jwerner@chromium.org>2016-10-17 22:43:37 +0200
commit4fda9bd0ec15d5d2cbc647811b46c0a23fdb865e (patch)
treee64c3703fe4248662976a3befd6fa62c409a9b84 /payloads/libpayload/drivers/timer/ipq40xx.c
parent9ac7a66f0e044a384069b02779201ed46c3c58bd (diff)
libpayload: Replace majority of timer drivers with a generic one
Currently every non-x86 platform supported by libpayload needs to provide its own timer driver. Most of the ones we have accumulated there look almost identical: For the frequency, return a preset constant. For the value, read a 32-bit register, possibly read another 32-bit register and shift+OR it with the previous one, then return that. Let's replace this with a single .c file that can easily handle all of those cases. Menuconfig convenience can still be maintained by providing several presets that select different defaults for the driver's configuration options (register address(es) and frequency). Removes an "enabled" check from Samsung MCT driver since coreboot always unconditionally enables that timer anyway. CQ-DEPEND=CL:344809 BRANCH=None BUG=None TEST=Booted Oak and Veyron, observed how dev-mode delay was still ~30s Change-Id: I61cb7d2ffd4902aa841c57f9afa9cd991f770acd Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Commit-Id: a036af6 Original-Change-Id: I9784e7c6aa5abd6d92478ea7ec1cf42c9a437546 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/347749 Reviewed-on: https://review.coreboot.org/17023 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'payloads/libpayload/drivers/timer/ipq40xx.c')
-rw-r--r--payloads/libpayload/drivers/timer/ipq40xx.c52
1 files changed, 0 insertions, 52 deletions
diff --git a/payloads/libpayload/drivers/timer/ipq40xx.c b/payloads/libpayload/drivers/timer/ipq40xx.c
deleted file mode 100644
index 0ca260047e..0000000000
--- a/payloads/libpayload/drivers/timer/ipq40xx.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Copyright (c) 2015, 2016, The Linux Foundation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- * * Neither the name of The Linux Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-#include <libpayload.h>
-
-#define GCNT_FREQ_MHZ 48
-
-#define MSM_TMR_BASE ((void *)0x004a1000u)
-#define GCNT_CNTCV_LO (MSM_TMR_BASE + 0x1000)
-#define GCNT_CNTCV_HI (MSM_TMR_BASE + 0x1004)
-
-uint64_t timer_hz(void)
-{
- return GCNT_FREQ_MHZ * 1000 * 1000;
-}
-
-uint64_t timer_raw_value(void)
-{
- uint32_t hi, lo;
-
- do {
- hi = read32(GCNT_CNTCV_HI);
- lo = read32(GCNT_CNTCV_LO);
- } while (hi != read32(GCNT_CNTCV_HI));
-
- return ((((uint64_t)hi) << 32) | lo);
-}