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authorPhilipp Hug <philipp@hug.cx>2018-07-07 14:24:53 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-09-12 12:31:28 +0000
commit3d398ad37af84bdbe15e5dc82d39213b8437dd12 (patch)
tree90237d5d38bc9bf1b783461e3b102f69f389fa61 /payloads/libpayload/arch/x86/main.c
parent803cf02801e4681604661bd8f6587fd303042b7a (diff)
soc/sifive/fu540: Initialize PLL and clock
Change-Id: Iba0669e08940e373aaf42cbba3a1ceffd68a4f52 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27439 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'payloads/libpayload/arch/x86/main.c')
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