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authorBrandon Breitenstein <brandon.breitenstein@intel.com>2016-08-29 16:24:24 -0700
committerAndrey Petrov <andrey.petrov@intel.com>2016-08-31 19:23:15 +0200
commit07215aaf71cd617e9929ebfbba733954d6b0aa74 (patch)
treeec9752d12f8b8b461943180eeccff5a1bcfcd09f /payloads/libpayload/arch/mips
parent4dfe13081922454e97e6b0f8d6532cd97c635b60 (diff)
soc/intel/apollolake: Update FSP UPD header files for SIC 1.1.3
Update FSP Header files to provide UPD for periodic training disable. This is for the SIC 1.1.3/150_11 FSP release. BUG=chrome-os-partner:54100 BRANCH=none TEST=built coreboot image with new headers for reef Change-Id: I2ba11aa3d2d664c1d34e39c4c8144fb1c4f2149a Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/16352 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'payloads/libpayload/arch/mips')
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