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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-12-14 13:05:21 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-12-14 22:29:48 +0100 |
| commit | 8af0d03fd49f9c88db98ef7b3c2d95bf1cd0f319 (patch) | |
| tree | e33aae504fe01548bfc51a96c8350c3d05d0e6ed /payloads/libpayload/arch/armv7/assembler.h | |
| parent | f6935a006a6ffe57413877093035cdc1a020e7bd (diff) | |
libpayload: Initial ARMv7 port
This compiles, but it's not tested yet.
Change-Id: I2f73a814649aa36c39af3e77cefd8a968671f5c0
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2035
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'payloads/libpayload/arch/armv7/assembler.h')
| -rw-r--r-- | payloads/libpayload/arch/armv7/assembler.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/payloads/libpayload/arch/armv7/assembler.h b/payloads/libpayload/arch/armv7/assembler.h new file mode 100644 index 0000000000..5e4789b145 --- /dev/null +++ b/payloads/libpayload/arch/armv7/assembler.h @@ -0,0 +1,60 @@ +/* + * arch/arm/include/asm/assembler.h + * + * Copyright (C) 1996-2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This file contains arm architecture specific defines + * for the different processors. + * + * Do not include any C declarations in this file - it is included by + * assembler source. + */ + +/* + * Endian independent macros for shifting bytes within registers. + */ +#ifndef __ARMEB__ +#define pull lsr +#define push lsl +#define get_byte_0 lsl #0 +#define get_byte_1 lsr #8 +#define get_byte_2 lsr #16 +#define get_byte_3 lsr #24 +#define put_byte_0 lsl #0 +#define put_byte_1 lsl #8 +#define put_byte_2 lsl #16 +#define put_byte_3 lsl #24 +#else +#define pull lsl +#define push lsr +#define get_byte_0 lsr #24 +#define get_byte_1 lsr #16 +#define get_byte_2 lsr #8 +#define get_byte_3 lsl #0 +#define put_byte_0 lsl #24 +#define put_byte_1 lsl #16 +#define put_byte_2 lsl #8 +#define put_byte_3 lsl #0 +#endif + +/* + * Data preload for architectures that support it + */ +#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) || \ + defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ + defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || \ + defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_7A__) || \ + defined(__ARM_ARCH_7R__) +#define PLD(code...) code +#else +#define PLD(code...) +#endif + +/* + * Cache alligned + */ +#define CALGN(code...) code |