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authorJulius Werner <jwerner@chromium.org>2018-10-10 15:31:36 -0700
committerJulius Werner <jwerner@chromium.org>2018-10-12 20:14:54 +0000
commitca52a258822c1c47d533684c5a4cbe5f2b7bd487 (patch)
tree4017c7a2e999f6a7e58f942a7a789352a6666660 /payloads/libpayload/arch/arm64/lib/tlb.c
parente1b1ec7154e4c41adf4eb6a0e4ebd08a2e938a2c (diff)
libpayload: arm64: Conform to new coreboot lib_helpers.h and assume EL2
This patch adds the new, faster architectural register accessors to libpayload that were already added to coreboot in CB:27881. It also hardcodes the assumption that coreboot payloads run at EL2, which has already been hardcoded in coreboot with CB:27880 (see rationale there). This means we can drop all the read_current/write_current stuff which added a lot of unnecessary helpers to check the current exception level. This patch breaks payloads that used read_current/write_current accessors, but it seems unlikely that many payloads deal with this stuff anyway, and it should be a trivial fix (just replace them with the respective _el2 versions). Also add accessors for a couple of more registers that are required to enable debug mode while I'm here. Change-Id: Ic9dfa48411f3805747613f03611f8a134a51cc46 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/29017 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Diffstat (limited to 'payloads/libpayload/arch/arm64/lib/tlb.c')
-rw-r--r--payloads/libpayload/arch/arm64/lib/tlb.c95
1 files changed, 0 insertions, 95 deletions
diff --git a/payloads/libpayload/arch/arm64/lib/tlb.c b/payloads/libpayload/arch/arm64/lib/tlb.c
deleted file mode 100644
index d80783d4ee..0000000000
--- a/payloads/libpayload/arch/arm64/lib/tlb.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * tlb.c: System intructions for TLB maintenance.
- * Reference: ARM Architecture Reference Manual, ARMv8-A edition
- */
-
-#include <stdint.h>
-
-#include <arch/lib_helpers.h>
-
-/* TLBIALL */
-void tlbiall_el1(void)
-{
- __asm__ __volatile__("tlbi alle1\n\t" : : : "memory");
-}
-
-void tlbiall_el2(void)
-{
- __asm__ __volatile__("tlbi alle2\n\t" : : : "memory");
-}
-
-void tlbiall_el3(void)
-{
- __asm__ __volatile__("tlbi alle3\n\t" : : : "memory");
-}
-
-void tlbiall_current(void)
-{
- uint32_t el = get_current_el();
- tlbiall(el);
-}
-
-void tlbiall(uint32_t el)
-{
- SWITCH_CASE_TLBI(tlbiall, el);
-}
-
-/* TLBIALLIS */
-void tlbiallis_el1(void)
-{
- __asm__ __volatile__("tlbi alle1is\n\t" : : : "memory");
-}
-
-void tlbiallis_el2(void)
-{
- __asm__ __volatile__("tlbi alle2is\n\t" : : : "memory");
-}
-
-void tlbiallis_el3(void)
-{
- __asm__ __volatile__("tlbi alle3is\n\t" : : : "memory");
-}
-
-void tlbiallis_current(void)
-{
- uint32_t el = get_current_el();
- tlbiallis(el);
-}
-
-void tlbiallis(uint32_t el)
-{
- SWITCH_CASE_TLBI(tlbiallis, el);
-}
-
-/* TLBIVAA */
-void tlbivaa_el1(uint64_t va)
-{
- __asm__ __volatile__("tlbi vaae1, %0\n\t" : : "r" (va) : "memory");
-}